The following Verilog code defines a function that computes the factorial of a number recursively. The automatic keyword is used to allow the function to be called recursively. Fill in the missing code that follows.
module factorial_test;
function automatic integer factorial;
input [31:0] num;
/*
Insert your code to implement factorial
*/
endfunction
integer result;
initial begin
/*
Insert your code to compute the factorial of 9
*/
$display("factorial = %d", result);
end
endmodule