This problem concerns the design of a circuit to find the square of a floating-point number, F x 2^E. F is a normalized 5-bit fraction, and E is a 5-bit integer; negative numbers are represented in 2’s complement. The result should be properly normalized. Take advantage of the fact that (-F)² =F².
(a) Draw a block diagram of the circuit. (Use only one adder and one complementer.)
(b) State your procedure, taking all special cases into account. Illustrate your procedure
for

F = 1.0110     E = 00100

(c) Draw an SM chart for the main controller. You may assume that multiplication is carried out using a separate control circuit, which outputs Mdone = 1 when multiplication is complete.

(d) Write a Verilog description of the system.