Question: Write a Verilog module that implements a 4-digit BCD adder with accumulator (see the block diagram that follows). If LD = 1, then the contents

Write a Verilog module that implements a 4-digit BCD adder with accumulator (see the block diagram that follows). If LD = 1, then the contents of BCDacc are replaced with BCDacc + BCDin. Write a task that adds two BCD digits and a carry and returns a BCD digit and a carry. Call this task concurrently four times in your code.

CD LD CLK BCD BCD CD BCD adder adder adder adder BCDin

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