Question: Design a MOD-100, binary counter using either two 74HC161 or two 74HC163 chips and any necessary gates. The IC counter chips are to be synchronously

Design a MOD-100, binary counter using either two 74HC161 or two 74HC163 chips and any necessary gates. The IC counter chips are to be synchronously cascaded together to produce the binary count sequence for 0 to 99. The MOD-100 is to have two control inputs, an active-LOW count enable (EN) and an active-LOW, asynchronous clear (C̅R̅). Label the counter outputs Q0, Q1, Q2, and so on, with Q₀ = LSB. Which output is the MSB?

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