Refer to the circuit of Figure 5-102. Assume that the ICs are of the TTL logic family. The Q waveform was obtained when the circuit was tested with the input signals shown and with the switch in the “up” position; it is not correct. Consider the following list of faults, and for each indicate “yes” or “no” as to whether it could be the actual fault. Explain each response.

(a) Point X is always LOW due to a faulty switch.

(b) U1 pin 1 is internally shorted to V_CC .

(c) The connection from U1-3 to U2-3 is open.

(d) There is a solder bridge between pins 6 and 7 of U1.

Figure 5-102

Transcribed Image Text:

+Vcc CLOCK A B O X B 1 2 4 I 51 74LS00 U1 3 2 CLOCK (a) (b) J +Voc 18. PRE U2 4 CLK K CLR 15 74LS112 5 +Vcc Q 6 chip: 74LS00 Vcc GND pin 7 pin 14 74LS112 pin 16 pin 8