In Section 7.2 we designed a processor that performs the operations listed in Table 7.1. Design a modified circuit that performs an additional operation Swap Rx, Ry. This operation swaps the contents of registers Rx and Ry. Use three bits f₂ f₁ f₀ to represent the input F shown in Figure 7.11 because there are now five operations, rather than four. Add a new register, named Tmp, into the system, to be used for temporary storage during the swap operation. Show logic expressions for the outputs of the control circuit, as was done in Section 7.2.

Data From Section 7.2

Table 7.1 Operation Load Rx, Data Move Rx, Ry Add Rx, Ry Sub Rx, Ry Operations performed in the processor. Function performed Rx + Data Rx + [Ry] Rx+ [Rx] + [Ry] Rx - [Rx]-[Ry]