(a) In the Core 2 Duo, each core can perform a PMINSW (Minimum of Packed Signed Word Integers) instruction with two 128-bit operands, placing the result back in the irst operand. For 16-bit words, how many minimum words can be determined in parallel in the Core 2 Duo?

(b) In the Cell processor, each SPE can perform an “average bytes” instruction on a pair of 128-bit registers RA and RB, with the resulting average byte placed in register RT. How many byte averages can be produced in parallel for all SPEs executing the same instruction?