Question: Consider the Add instruction that has the control sequence given in Figure 7.6. The processor is driven by a continuously running clock, such that each

Consider the Add instruction that has the control sequence given in Figure 7.6. The processor is driven by a continuously running clock, such that each control step is 2 ns in duration. How long will the processor have to wait in steps 2 and 5, assuming that a memory read operation takes 16 ns to complete? What percentage of time is the processor idle during execution of this instruction?

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