Question: Assume that the delay in a delay-and-multiply receiver for DPSK as shown in Fig. 9.17 is in error by |ÎT|. (a) Show that the asymptotic

Assume that the delay in a delay-and-multiply receiver for DPSK as shown in Fig. 9.17 is in error by |ΔT|. 

(a) Show that the asymptotic bit error probability becomes E, PE, IAT| N JAT| Ep No = e(VE) + e(vz(1 – |AT| R)

(Consider the possible data sequences 11, 00, 10, and 01 thereby accounting for the cases of degradation and no degradation in the signal component at the integrator output.)

(b) Plot PE,|ΔT| versus z in dB for |Δf| R = 0, 0.1, 0.2, 0.3, 0.4. Estimate the degradation in dB at a probability of error of 10-6.

E, PE, IAT| N JAT| Ep No = e(VE) + e(vz(1 |AT| R)

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