Question: Implement the nonblocking queue of Example 13.30 on an x86. Do you need fence instructions to ensure consistency? If you have access to appropriate hardware,
Implement the nonblocking queue of Example 13.30 on an x86. Do you need fence instructions to ensure consistency? If you have access to appropriate hardware, port your code to a machine with a more relaxed memory model (e.g., ARM or Power). What new fences or atomic references do you need?
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