$0)$ Modify $($add drawing to the provided figure or draw by yourselves$)$

the following MIPS architecture to add JAL, JR$,$ SLL$,$ SRL instructions. JAL instruction

works similarly to J instruction but stores next instruction to $ra $($$$31)$ register.

Therefore, JAL performs two operations at the same time: It not only stores the address

of the next instruction $([$PC$+4])$ in the return address register $($$ra$),$ but also jumps to the

target address similar to the Jump instruction. JR instructions is an R$-$type instruction

that reads the address for jump from the register $ra and jumps to that particular

address. Also, decode your JAL, JR$,$ SRL and SLL instructions to fill up and add more

control signals to the truth table $($page#$3)$ as you require.