Question: 02. A ripple counter using negative edge-triggered D-flip flops is shown in Fig. 1. The flip-flops are cleared to 'O' by a 'O' at the

02. A ripple counter using negative edge-triggered D-flip flops is shown

02. A ripple counter using negative edge-triggered D-flip flops is shown in Fig. 1. The flip-flops are cleared to 'O' by a 'O' at the R input. The feedback logic is to be designed to obtain the count sequence shown in the same figure. The correct feedback logic is: (GATE - 87) D Q Do Qof Co "D, aut C1 Q Clock R Feedback Logic F Count sequence in the order of Q,Q, Q.: 000 001 - 010011 100-101 Fig: 1 (a) F = Q2Q.Q. (c) F=Q,Q, Q. (b) F=Q20,00 (d) F=0.0.0

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