Question 5: 4-bit Ripple Counter using J-K FF Design a 4-bit ripple counter using four J-K FFs (74LS107). The circuit should have 4 outputs to display a 4-bit binary number It should have a Clock signal to change the state of the circuit. - - It should have a Clear input to reset the outputs. The function of the 4-bit counter is straightforward. At the beginning, the outputs will display the number 0000. Each time the clock ticks, the counter increases the value by 1. After the clock ticks for 15 times, the outputs should display 1111. Draw the logic diagram of your circuit. If you need hints: We need four J-K FFs, each J-K FF will output one bit of the number. Write down all binary numbers from 0000 to 1111. Notice that the least significant bit flips every time the clock ticks. How can you make the output of a J-K FF flip each time the clock ticks? Let the outputs be Q1-04 where Q1 is the most significant bit and Q4 is the least significant bit. Notice that Q3 is flipped when Q4 changes value from 1 to O (but it does not happen when Q4 changes from 0 to 1). The same thing occurs for Q2 and Q3, and so on. Remember that we talked briefly about negative edge vs. positive edge. Is changing from 1 to 0 a negative edge? The J-K FF chip that we use is technically negative edge-triggered. Use this fact to design the output 03 using output Q4. Then the design of Q1 and Q2 will become trivial