Question: 1. A processor has a 32x8 RAM memory system and an 8 byte direct-mapped cache. Table 0 shows the initial state of the cache. Write

1. A processor has a 32x8 RAM memory system and an

8 byte direct-mapped cache. Table 0 shows the initial state of the

1. A processor has a 32x8 RAM memory system and an 8 byte direct-mapped cache. Table 0 shows the initial state of the cache. Write hit or state the type of miss under each address in the memory access sequence below. Show the new state of the cache each memory access in the given tables, and circle any change in made to the cache 0. Initial State 1 St access Tagg eX Data V Tagg Index Data 10 0110 1000 1001 2nd access 3rd access Tag Index Data Index Data Tag

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