Question: 1 ) Build a 3 - bit synchronous counter that counts the sequence 4 , 2 , 0 , 1 , 3 , 5 ,

1) Build a 3-bit synchronous counter that counts the sequence 4,2,0,1,3,5, etc. Use dont care
conditions for any unavailable next states. Use a T flip-flop for the most significant bit, a D
flip-flop for the middle bit, and a T flip-flop for the leastsignificant bit. Show your State Table,
K-Maps, and properly formatted circuit diagram.
Draw me the diagram on LOGISM And make sure the diagram is correct please.

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