$($#$1)$ Combinational Circuit design, synthesis and simulation

For the XOR gate shown,

Code for $3$ levels of the design: Gate, RTL$,$ and Behavior Levels. Submit $($screenshot and source file in $*.$txt$)$ the designs after proven working

Code one single Test Bench $($TB$).$ Submit $($screenshot and source file in $*.$txt$)$ the TB after proven working

Then, use the IDE tool,

edaplayground.com, to run synthesis and simulation. Submit screenshots of each synthesized circuit and simulation waveform pair.

Note

Submit $3$ circuit descriptions $($

design.sv$)$ representing the $3$ levels for the same design, and corresponding synthesis and simulation results using one single test bench for all $3.$ So$,3^{**}3$ files to submit total.

In this assignment, single test bench can be used to test all three design implementations. This is similar to software testing, a single test can be applied to test many software implementations meeting the same requirement.

$\backslash$table$[[A,B,Y=$A XOR B$],[0,0,0],[0,1,1],[1,0,1],[1,1,0]]$