1. Consider an inner product loop that computes S = x[i]*y[i] for vectors of length N. The MIPS assembly code is: loop: lw 1w r1, X(r4) r2, Y (r4) multf r3, rl, r2 addf r5, r3, r5 add r4, r4, 8 SW r5, 0(17) bne r4, rn, loop % loading x[i] in rl % loading y[i] in r2 floating point multiply floating point add % floating point numbers, 64 bits % store S %rn has the value of N Because these numbers are floating-point, the execute stage takes two cycles, so the modified MIPS pipeline is now: IF, ID, EX1, EX2, MEM, WB. a. Schedule this loop on a the new pipeline with no forwarding b. Schedule this loop on the new pipeline with forwarding c. Write the code of a 2x unrolled version of this loop reordering the instructions to minimize stalls, show its schedule on the new pipeline (add 10 to the register numbers to distinguish the second iteration from the first)