1) Determine the logic level for each input combinations in Table 1 so that the desired result can be realized. Table 1 Desired Result PRE CLR J K CLK Q Set initial value Q = 1 Xx 1 1 u Output Q stays the same Output Q become 0, no change in asynchronous input Output Q is not the previous Q 1 1 RESET 1 1 SETO 1 1 2) Answer all questions. a) Which state that JK flip-flop has, but not on SR flip-flop. b) Identify whether the JK flip flop in 7476, is a positive-edge triggered or negative- edge triggered flip flop