Question: 1. Explain what contact bounce is? 2. How does the latch in this experiment eliminate contact bounce? 3. Is the PRESET and CLEAR pins

1. Explain what contact bounce is? 2. How does the latch in this experiment eliminate contact bounce? 3. Is 1.4. 1.5. COMPONENTS: 1 x IC 2 x LED 1 x IC Resistors EQUIPMENT: 74LSOON (quad 2-input open-collector NAND

1. Explain what contact bounce is? 2. How does the latch in this experiment eliminate contact bounce? 3. Is the PRESET and CLEAR pins on your J-K activated with a logic 0 or a logic 1? 4. When the 5/PRESET pin on the J-K flip-flop is grounded, what will the output Q be equal to? 5. When the CLEAR pin on the J-K flip-flop is grounded what will the output Q be equal to? 6. Does the output Q for the experiment change on the positive or on the negative edge of the clock pulse? 7. Simulate the operation of the circuit by using NI Multisim and fill up the following truth table: K CLK Q 1.4. 1.5. COMPONENTS: 1 x IC 2 x LED 1 x IC Resistors EQUIPMENT: 74LSOON (quad 2-input open-collector NAND gate) 5 mm LEDs (1 RED color and 1 GREEN in color) 74HCT112 Dual JK negative edge triggered Flip-Flop with pre-set. 4 Watt metal film through hole resistors Development board Logic Probe Digital Multimeter

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