1. Given a processor using 32-bit memory addresses, and a 4 KiB direct-mapped cache memory that stores 32 bits of data for each address. Approximately what percent of the cache memory is spent on address and data valid information? 2. Given a virtual memory of size 1 GiB, physical memory of size 128 KiB, and page size equal to 8 KiB. How many bits are used to specify a virtual page number? 3. Given a processor using 32-bit memory addresses, and a fully-associative cache memory that stores 32 bits of data for each address. Approximately what percent of the cache memory is spent on address and data valid information? 4. Given a processor using 32-bit memory addresses, and a 1 KiB (of actual data) direct-mapped cache memory that stores 32 bits of data for each address. What is the number of tag bits?