Question: 10. [ g] How many bus cycles does a 32-bit CPU need to read half-word data stored in a non- boundary alignment address 11. Array

 10. [ g] How many bus cycles does a 32-bit CPU

need to read half-word data stored in a non- boundary alignment address

10. [ g] How many bus cycles does a 32-bit CPU need to read half-word data stored in a non- boundary alignment address 11. Array A is a int type array with 100 data. The starting address of the array is stored in register $82, and the values of variables g and h are stored in register $ so. And $ 51, which is the MIPS microprocessor assembly language instruction series, which completes the following C language statement function g = h + A[8]; (A) lw $t0,32($s2) add $so, $s1, $t0 (B) lw $t0,8 ($ s2) add $ 0, $ 51, $ to c) lw $t0,32 ($ 52) add $ 51, $ so, $ to D lw $t0,8 ($ s2) add $ 51, $ 50, $ to

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