Question: 10.1.d Logic Function implementation using 81 Multiplexer A combinational circuit has four inputs X,Y,Z,W and an output F which is: F=XY+ZW+YZW Design a circuit that

 10.1.d Logic Function implementation using 81 Multiplexer A combinational circuit has

10.1.d Logic Function implementation using 81 Multiplexer A combinational circuit has four inputs X,Y,Z,W and an output F which is: F=XY+ZW+YZW Design a circuit that generates function F=XY+ZW+YZW using 74151 8-to1 Multiplexer and NAND gates. i) Obtain the truth table of the circuit. ii) Realize the circuit in Proteus program using 74151 multiplexer and 7400 NAND gate. (Hint: Remember that NAND gates can be used as INVERTER) 10.1.e BCD code indicator design using 81 Multiplexer A circuit with four inputs examines the binary code applied to its inputs to see if it is a legal BCD code (i.e. 1001 ). Assume that the desired output for a valid BCD code is a " 1 " and for an invalid BCD code is a " 0 ". Design the circuit that indicates whether the 4 bit binary input is a BCD code or not by using 8 -to- 1 line multiplexer and XOR gates. i) Obtain the truth table of the circuit. ii) Realize the circuit in Proteus program using 74151 multiplexer and 7486 XOR gate. (Hint: Remember that XOR gates can be used as INVERTER)

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