Question: 1.c Logic Function implementation using 41 Multiplexer A combinational circuit has three inputs X,Y,Z and an output F which is: F=XY+XYZ+XYZ+YZ Design a circuit that

1.c Logic Function implementation using 41 Multiplexer A combinational circuit has three inputs X,Y,Z and an output F which is: F=XY+XYZ+XYZ+YZ Design a circuit that generates function F=XY+XYZ+XYZ+YZ using 74151 8-to-1 Multiplexer and NOR gates. Note that an 81 MUX can be used as a 41 MUX and NOR gates as INVERTER. i) Obtain the truth table of the circuit. ii) Realize the circuit in Proteus program using 74151 multiplexer and 7402 NOR gate

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