Question: 17. Assume for a given processor the CPI of arithmetic instructions is 1, the CPl of load/store instructions is 10, and the CPl of branch

 17. Assume for a given processor the CPI of arithmetic instructions

17. Assume for a given processor the CPI of arithmetic instructions is 1, the CPl of load/store instructions is 10, and the CPl of branch instractions is 3. Assume a program has the following instruction breakdowns: SM arithmetic instructions, 3M load/store instructions,1 M branch instructions. . CCT-clock cycle time IC.-instruction count (arithmetic)- SM, (CPI-1) ICinstruction count (load/store) -3M, (CPI-10) IC -instruction count (branch) -IM, (CPI-3) The total CCT will be M? 18. Suppose that new, more powerful arithmetic instructions are added to the instruction set. On average, through the use of these more powerful arithmetic instructions, we can reduce the number of arithmetic instructions needed to execute a program by 25%, and the cost of increasing the clock cycle time by only 10%. The new total CCT will be approximately Answer:M (2pt) Does this new architecture run faster or slower than the old one? Answer (Fill in either faster or slower) (2pt) 19. A given application written in Java runs 15 seconds on a desktop processor. A new Java compiler is released that requires only 06 as many instructions as the old compiler. Unfortunately, it increases the CPI by 12. How many seconds will the application run using new compiler? Answer 20. (Tp) Check the MIPS green sheet, Provide the type and the assembly language instruction described by the following MIPS fields: Answer(1pt) Type (I.J, or R) MIPS instruction Machine code (exactly 8 hexadecimal digits)Answer: Answer (3pt) 3pe)

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