2) A newly designed processor P1 operating at 2.5 GHz is running a web server benchmark. The following tables show P1's CPI for each instruction type and the instruction frequency statistics for the benchmark: Instruction Type Loads/Stores Branches Integer ALU Integer Multiply Clock Cycles 3 4 1 7 Instruction Type Loads/Stores Branches Integer ALU Integer Multiply Frequency 40% 10% 45% 5% (a) (6 points) To compete with other products available in the market, the processor P1 must be able to achieve an instruction execution rate of 1,100 MIPS (millions of instructions per second). Will P1 be able to satisfy the desired instruction rate requirement? (b) (4 points) A designer proposes a change that will cut down the time taken by "Loads/stores" in P1 from 3 cycles to 2 cycles. Calculate the speedup in performance obtained by this change.