2. Priority Encoder is an encoder circuit that includes the priority function. The operation of the priority encoder is such that if two or more inputs are equal to 1 at the same time, the input having the highest priority will take precedence. The truth table of a four-input priority encoder is given in Table 1.2. In addition to the two outputs x and y, the circuit has a third output designated by V; this is a valid bit indicator that is set to 1 when one or more inputs are equal to 1. If all inputs are 0, there is no valid input and V is equal to 0. The other two outputs are not inspected when V equals 0 and are specified as dont-care conditions. Note that whereas X s in output columns represent dont-care conditions, the Xs in the input columns are useful for representing a truth table in condensed form. Instead of listing all 16 minterms of four variables, the truth table uses an X to represent either 1 or 0. For example, X100 represents the two minterms 0100

and 1100.

D0	D1	D2	D3	X	Y	V
0 1 X X X	0 0 1 X X	0 0 0 1 X	0 0 0 0 1	X 0 0 1 1	X 0 1 0 1	0 1 1 1 1

Table 1.2: Truth Table of a Priority Encoder

Draw the circuit schematic of the priority encoder and then write the HDL gate-level description of the priority encoder according to the circuit.

3. Write the HDL gate level description of the priority encoder shown in Table 1.2.

4. Write the HDL dataflow description of the priority encoder shown in Table 1.2.

5. Write the HDL behavioral description of the priority encoder shown in Table 1.2.