$(37\%)$ Consider a $2-$way set associative write$-$back cache with a total data size of $128$ bytes with $32-$byte

blocks in processor that uses $8-$bit addresses for a byte$-$addressable memory. Assume that the cache is

initially empty and LRU replacement is used.

$($a$)(5\%)$ How many blocks are there in the cache?

$($b$)(5\%)$ How many sets are there in the cache?

$($c$)(5\%)$ How many bits are there in each tag for the cache?

$($d$)(12\%)$ Complete the table below for a sequence of memory references $($occurring from left to right$),$

where each memory address is given as byte address in base$-10.$