3. The table below represents the same scenario as part 2 using a write-back cache Dirty VTag Y 01 Mem[01000] Data Indexv 001 010 011 100 101 110 Y 10Mem[10010] Y 11 Mem[11110] Y 00 Mem[00111] a) Show the modified table after the following the following sequence of cache accesses (listed by address): \0xIE, 0xlD, 0x12, 0xlB, OxlE. Assume that underlined accesses correspond to cache writes, while all others correspond to cache reads b) Which of the accesses from part 3a result in a read hit? c) Which of the accesses from part 3aw immediately change a value in memory