3. When is the Shift left 2 hardware used? Why is it necessary to shift left by 2?

4. Assume that the processor is executing the instruction add $s0, $t1, $t1 whereby $t1 = 0x0000 8000 and $s0 = 0x9000 0000. Give the values that will be observed on the signal buses at the places indicated on the diagram.

A:

B:

C:

The figure below shows the MIPS datapath. The following questions are related to this diagram. PCSIC - Add Saxo >Add resul RegWrite Shift left 2 Instruction 25-21 Read MemWrite Instruction [20-16) ALUSre Memtoeg Read address Instruction (31-01 Instruction memory register 1 Read Read data 1 register 2 Read WYR data 2 register Write data Registers data 2 0 ALU result A ddress Read data Instruction [15-11) EaMO - Eaxo Write data Data memory Regoist Instruction 115-0) 16 Sign extend ALU control MemRead Instruction (5-0) The figure below shows the MIPS datapath. The following questions are related to this diagram. PCSIC - Add Saxo >Add resul RegWrite Shift left 2 Instruction 25-21 Read MemWrite Instruction [20-16) ALUSre Memtoeg Read address Instruction (31-01 Instruction memory register 1 Read Read data 1 register 2 Read WYR data 2 register Write data Registers data 2 0 ALU result A ddress Read data Instruction [15-11) EaMO - Eaxo Write data Data memory Regoist Instruction 115-0) 16 Sign extend ALU control MemRead Instruction (5-0)