$4\mathrm{.}5$ Voltage$-$Divider Bias

Figure $4\mathrm{.}5$ depicts the voltage$-$divider bias circuit for an n$-$channel enhancementmode MOSFET, a popular circuit to create a stable operating point in spite of changing environmental temperature and device$-$to$-$device variations. In this problem the load line graphical analysis tectinique establishes the drain current operating point.

Figure $4\mathrm{.}5$: Circuit for Problem $4\mathrm{.}5$

Analysls

Use a suitable plotting tool such as Mathscript or MATLAB to plot the transistor drain current $I_D$ as a function of gate$-$source voltage $V_{GS}$ when the device operates in saturation mode; use the transistor parameters listed in the table below. Set up the plot limits as $0$ to $3$ volts for $V_{GS}$ and $0$ to $50$ mA for $I_D.$

Draw the load line established by the voltage divider resistors $R_{GI}$ and $R_{G2},$ the supply voltage $V_{DD},$ and the source resistor $R_S$ directly on the transistor curve from the previous step. Identify the circuit's

$4\mathrm{.}5.$ VOLTAGE$-$DIVIDER BIAS

operating point $I_{DQ}$ and $V_{GSQ}$ at the intersection of the load line and the transistor curve.

Determine the value of resistor $R_D$ that sets the drain voltage $V_{DQ}$ to $5\mathrm{.}0$ V $,$ and then choose the closest standard resistor value from the parts list of Appendix $($A on page $167)$

Determine the drain voltage $V_{DQ}$ using your selected value of $R_D.$

Use the following circuit components:

$\backslash$table$[[$Component$,$Value$],[\backslash$table$[[$VoD$],[$MOSFET$],[$resistors$]],\backslash$table$[[9$ V$],[V_i=1\mathrm{.}8V$ and $K=50m\frac{A}{V^2}$