$4.$ Consider a system that takes following time on each the following $5-$stages:

Fetch $100$ ps

Decode $60$ ps

Execute $100$ ps

Memory $250$ ps

Writeback $100$ ps

a$.$ For a single cycle implementation, calculate the cycle time, latency and the

throughput for the given system. $[3+3+3$ Marks $=9$ Marks$]$

b$.$ For a multi$-$cycle implementation $($not pipelined$),$ calculate the cycle time,

latency and the throughput for the given system, considering all different

types of instructions. $[3+3+3$ Marks $=9$ Marks$]$

c$.$ For a pipelined implementation, calculate the cycle time, latency and the

throughput, assuming that the pipeline implementation adds $5$ ps extra cost

for each register between the two stages? $[3+3+3$ Marks $=9$ Marks$]$

d$.$ Consider the system is modified to $6-$stage pipeline by splitting the longest

pipeline stage into two smaller stages of equal duration. Calculate the

resultant cycle time, latency and throughput of this modified systems,

considering $5$ ps extra cost for each register between the two stages. $[3+3+$

$3$ Marks $=9$ Marks$]$