4. (Correctness) (5 points) Stalling. A stall has occurred in the ID stage in the given MIPS pipeline. This means that a hardware noop is to be pushed into the EX stage, while the instructions in the IF and ID stages and the contents of the IF/ID register must remain the same. Hazard detection unit ID/EX.MemRead IF/DWrite ID/EX WB EX/MEM WB M M u Control M MEM/WB IF ID EX M -(WBL M X Registers >ALU PC Instruction memory M Data memory IF/ID. RegisterRs IF/ID. Register IF/ID. Register IF/ID. RegisterRd ID/EX. RegisterRt Rd. Forwarding unit a. For the hardware noop to be pushed into the EX stage, help Mario fill in the following table to list the control signals that will be written to the ID/EX register. If the signal is critical, please fill in the correct value (0/1). If the signal is not critical, you can enter 'X' (don't care). RegWrite Mem Write Mem Read MemtoReg 4. (Correctness) (5 points) Stalling. A stall has occurred in the ID stage in the given MIPS pipeline. This means that a hardware noop is to be pushed into the EX stage, while the instructions in the IF and ID stages and the contents of the IF/ID register must remain the same. Hazard detection unit ID/EX.MemRead IF/DWrite ID/EX WB EX/MEM WB M M u Control M MEM/WB IF ID EX M -(WBL M X Registers >ALU PC Instruction memory M Data memory IF/ID. RegisterRs IF/ID. Register IF/ID. Register IF/ID. RegisterRd ID/EX. RegisterRt Rd. Forwarding unit a. For the hardware noop to be pushed into the EX stage, help Mario fill in the following table to list the control signals that will be written to the ID/EX register. If the signal is critical, please fill in the correct value (0/1). If the signal is not critical, you can enter 'X' (don't care). RegWrite Mem Write Mem Read MemtoReg