(Correctness) (5 points) Stalling. A stall has occurred in the ID stage in the given MIPS pipeline. This means that a hardware noop is to be pushed into the EX stage, while the instructions in the IF and ID stages and the contents of the IF/ID register must remain the same. Hazard detection unit ID/EX. MemRead IF/DWrite ID/EX (WBf EX/MEM WB Control M 3x PCWrite MEM/WB WB IFID EX M Registers Instruction M ALU PC Instruction memory SX Data memory M IF/ID. RegisterRs IF/ID. Register IF/D. Registert IF/ID. RegisterRd ID/EX.RegisterRt IRI Rd. 3x Rs RI Forwarding unit b. For the hardware noop to be pushed into the EX stage, two additional control signals are needed to successfully stall the pipeline. These are generated by the hazard detection unit as shown in the figure. Help Mario fill the value of these signals. If the signal is critical, please fill in the correct value (0/1). If the signal is not critical, you can enter 'X' (don't care). PC Write IF/ID Write (Correctness) (5 points) Stalling. A stall has occurred in the ID stage in the given MIPS pipeline. This means that a hardware noop is to be pushed into the EX stage, while the instructions in the IF and ID stages and the contents of the IF/ID register must remain the same. Hazard detection unit ID/EX. MemRead IF/DWrite ID/EX (WBf EX/MEM WB Control M 3x PCWrite MEM/WB WB IFID EX M Registers Instruction M ALU PC Instruction memory SX Data memory M IF/ID. RegisterRs IF/ID. Register IF/D. Registert IF/ID. RegisterRd ID/EX.RegisterRt IRI Rd. 3x Rs RI Forwarding unit b. For the hardware noop to be pushed into the EX stage, two additional control signals are needed to successfully stall the pipeline. These are generated by the hazard detection unit as shown in the figure. Help Mario fill the value of these signals. If the signal is critical, please fill in the correct value (0/1). If the signal is not critical, you can enter 'X' (don't care). PC Write IF/ID Write