Question: (Correctness) (5 points) Stalling. A stall has occurred in the ID stage in the given MIPS pipeline. This means that a hardware noop is to

 (Correctness) (5 points) Stalling. A stall has occurred in the ID

stage in the given MIPS pipeline. This means that a hardware noop

is to be pushed into the EX stage, while the instructions in

(Correctness) (5 points) Stalling. A stall has occurred in the ID stage in the given MIPS pipeline. This means that a hardware noop is to be pushed into the EX stage, while the instructions in the IF and ID stages and the contents of the IF/ID register must remain the same. Hazard detection unit ID/EX. MemRead IF/DWrite ID/EX WBH EX/MEM WB M u Control M PCWrite MEM/WB WB IF/ID 0- EX M Esx Instruction Registers ALU: M u PC Instruction memory M Data memory IF/ID. RegisterRs IF/ID. Register IF/ID. Registert IF/ID. RegisterRd ID/EX.RegisterRt M Rt Rd. Rs Rt Forwarding unit a. For the hardware noop to be pushed into the EX stage, help Mario fill in the following table to list the control signals that will be written to the ID/EX register. If the signal is critical, please fill in the correct value (0/1). If the signal is not critical, you can enter 'X' (don't care). RegWrite MemWrite MemRead MemtoReg b. For the hardware noop to be pushed into the EX stage, two additional control signals are needed to successfully stall the pipeline. These are generated by the hazard detection unit as shown in the figure. Help Mario fill the value of these signals. If the signal is critical, please fill in the correct value (0/1). If the signal is not critical, you can enter 'X' (don't care). PC Write IF/ID Write (Correctness) (5 points) Stalling. A stall has occurred in the ID stage in the given MIPS pipeline. This means that a hardware noop is to be pushed into the EX stage, while the instructions in the IF and ID stages and the contents of the IF/ID register must remain the same. Hazard detection unit ID/EX. MemRead IF/DWrite ID/EX WBH EX/MEM WB M u Control M PCWrite MEM/WB WB IF/ID 0- EX M Esx Instruction Registers ALU: M u PC Instruction memory M Data memory IF/ID. RegisterRs IF/ID. Register IF/ID. Registert IF/ID. RegisterRd ID/EX.RegisterRt M Rt Rd. Rs Rt Forwarding unit a. For the hardware noop to be pushed into the EX stage, help Mario fill in the following table to list the control signals that will be written to the ID/EX register. If the signal is critical, please fill in the correct value (0/1). If the signal is not critical, you can enter 'X' (don't care). RegWrite MemWrite MemRead MemtoReg b. For the hardware noop to be pushed into the EX stage, two additional control signals are needed to successfully stall the pipeline. These are generated by the hazard detection unit as shown in the figure. Help Mario fill the value of these signals. If the signal is critical, please fill in the correct value (0/1). If the signal is not critical, you can enter 'X' (don't care). PC Write IF/ID Write

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