Question: 4.6 We wish to design a shift-left circuit manually. The inputs include a, which is an 8-bit signal to be shifted, and ctrl, which is

4.6 We wish to design a shift-left circuit manually. The inputs

4.6 We wish to design a shift-left circuit manually. The inputs include a, which is an 8-bit signal to be shifted, and ctrl, which is a 3-bit signal specifying the amount to be shifted. Both are with the std.logic.vector data type. The output y is an 8-bit signal with the std.logic.vector data type. Use concurrent signal assignment statements to derive the circuit and draw the conceptual diagram

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