Question: 5 . 1 1 ) A RISC processor that uses five - step sequence in Figure 5 . 4 is driven by a 1 -

5.11) A RISC processor that uses five-step sequence in Figure 5.4 is driven by a 1-GHz clock. Instruction statistics in a large program are as follow:
Branch 20%
Load 20%
Store 10%
Computation Inst 50%
Estimate the rate of instruciton exection in each of the following.
a.) access to the memory is always completed in 1 clock cycle.

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