5.) [10 points] (Exercise 5.13) In this exercise, we will examine how replacement policies impact miss rate. Assume a 2-way set associative cache with 4 blocks. To solve the problems in this exercise, you may find it helpful to draw a table like the one below, as demonstrated for the address sequence 0, 1, 2, 3,4." Contents of Cache Blocks After Reference Address of Memory Block Accessed Evicted Block Set 0 Set 1 Set 1 Hit or Miss Miss Miss Miss Miss Miss Set 0 Mem[O] Mem[O] Mem[O] Mem[O] Mem[4] 0 2 3 4 Mem[2] Mem[2] Mem[2] Mem[1] Mem[1] Mem1 Mem[3] Mem MemI3] 0 Consider the following address sequence: 0, 2, 4, 8, 10, 12, 14, 16, 0 a.) [10 points] Assuming an LRU replacement policy, how many hits does this address sequence exhibit