$5.$ a$)$ Consider a direct$-$mapped cache memory with main memory size $\backslash (=1024\backslash )$ words, block size of main memory $\backslash (=8\backslash )$ words and Cache memory size $\backslash (=64\backslash )$ words Design the main memory and cache memory by calculating

i$)$ Number of blocks in main memory

ii$)$ Number of words per block

iii$)$ Number of Cache lines in cache memory

iv$)$ Number of bits required to represent block Number and block offset in main memory

v$)$ Number of bits required to represent tag and cache lines in cache memory