Question: 5. The following code is executed by an ARM processor with each instruction executed exactly once: MOV r0,#0 LDR r1,#10 MOV r2,#0 ADR r3,c ADR

5. The following code is executed by an ARM processor with each instruction executed exactly once: MOV r0,#0 LDR r1,#10 MOV r2,#0 ADR

5. The following code is executed by an ARM processor with each instruction executed exactly once: MOV r0,#0 LDR r1,#10 MOV r2,#0 ADR r3,c ADR r5,x ; loop test ; use r0 for i, set to 0 get value of N for loop termination test ; use r2 for f, set to 0 ; load r3 with address of base of c array ; load r5 with address of base of x array loop CMP r0,rl BGE loopend ;ifi N, exit loop loop body LDR r4,[r3,r0] LDR r6,[r5,r0] MUL r4.r4.r6 ADD r2,r2,r4 get value of clil get value of xi] compute cl*xi] add into running sum f update loop counter ADD r0,ro,#1 B loop ; add 1 toi ; unconditional branch to top of loop Assume that the following code fragment was loaded at 0x0000 MOV r0, #0 LDR r2, #10 MOV r2, #0 0001 0010 0011 0100 0101 loop CMP rO, r1 0110 ADR r5, x BGE loopend 5. The following code is executed by an ARM processor with each instruction executed exactly once: MOV r0,#0 LDR r1,#10 MOV r2,#0 ADR r3,c ADR r5,x ; loop test ; use r0 for i, set to 0 get value of N for loop termination test ; use r2 for f, set to 0 ; load r3 with address of base of c array ; load r5 with address of base of x array loop CMP r0,rl BGE loopend ;ifi N, exit loop loop body LDR r4,[r3,r0] LDR r6,[r5,r0] MUL r4.r4.r6 ADD r2,r2,r4 get value of clil get value of xi] compute cl*xi] add into running sum f update loop counter ADD r0,ro,#1 B loop ; add 1 toi ; unconditional branch to top of loop Assume that the following code fragment was loaded at 0x0000 MOV r0, #0 LDR r2, #10 MOV r2, #0 0001 0010 0011 0100 0101 loop CMP rO, r1 0110 ADR r5, x BGE loopend

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