5.16 As described in Section 5.7, virtual memory uses a page table to track the mapping of virtual addresses to physical addresses. This exercise shows how this table must be updated as addresses are accessed. The following data constitute a stream of virtual byte addresses as seen on a system. Assume 4 KiB pages, a four- entry fully associative TLB, and true LRU replacement. If pages must be brought in from disk, increment the next largest page number. Decima1 4669 2227 13916 3458748870 12608 49225 hex 0x123d0x08b3 0x365c 0x871b 0xbee60x3140 0xc049 TLB Physical Page Number 12 Time Since Last Access Tag Oxb 0x7 0x3 0x4 Valid 6 3 0 9 Page table Index 0 Valid Physical Page or in Disk 1 Disk 2 Disk Disk Disk Disk 3 12 5.16.1 [10] For each access shown above, list whether the access is a hit or miss in the TLB whether the access is a hit or miss in the page table, whether the access is a page fault, the updated state of the TLB. 5.16.2 | 15] Repeat Exercise 5.16. 1, but this time use 16 KiB pages instead of 4 KiB pages. What would be some of the advantages of having a larger page size? What are some of the disadvantages? 5.16.3 [15] Repeat Exercise 5.16.1, but this time use 4 KiB pages and a two-way set associative TLB 5.16.4 [15] Repeat Exercise 5.16.1, but this time use 4 KiB pages and a direct mapped TLB