$7.$ A processor has a $4294967296-$byte data memory and a single data cache $($cache

A$).$ Cache A is $1-$way set associative and contains $131072$ lines each of which is $256$

bytes in size. When the MIPS load byte instruction lb $$8,-2($$$4)$ is executed, CPU

register $$4$ contains the address of the next to last byte within memory block

number $2928610.$

a$)(3)$ Show the $8-$digit hex address contained in register $$4.$

b$)(3)$ Suppose register $$6$ contains some unspecified memory address. Write down

a sequence of MIPS true$-$op instructions that compute the cache line number to

which the address in register $$6$ maps. The line number computed should be placed

into register $$3.$ Your instruction sequence may contain one or two MIPS true$-$op

instructions and should work for any memory address contained in $$6$ without

changing $$6.$

c$)(3)$ Cache B$,$ a different cache, contains a total of $131072$ lines and is organized as

a $4-$way set associative cache. Each cache line is $512$ bytes in size. To what set within

this $4-$way set associative cache does the address $0$xC$306$FCDE map?

d$)(3)$ If the reference to address $0$xC$306$FCDE causes a hit in Cache hit B$,$ what is the

tag for the cache line in which the hit occurs? Express your answer in hex.