(a) (b) Draw the block diagram representing the Harvard computer architecture, showing proper labels of different...
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(a) (b) Draw the block diagram representing the Harvard computer architecture, showing proper labels of different blocks and bus interconnections. [5 Marks] Most PIC18 MCUs provide data memory of up to a size of 4 KB (kilobytes). (i) How many bits are required to address the entire content of the 4 KB of the data memory? (ii) [2 marks] Most instructions in PIC18 use 8 bits to identify the address of the file register in data memory. Is this approach sufficient to address the entire data memory of 4 KB? If no, how does PIC18 solve this shortfall? [3 Marks] (iii) If the data memory size is expanded to 8 KB, how many bits are now required to address the entire data memory? How would this affect the current method used by PIC18 instructions that implement the 8-bit file register addressing? How can PIC18 solve this issue? [2 marks] (a) (b) Draw the block diagram representing the Harvard computer architecture, showing proper labels of different blocks and bus interconnections. [5 Marks] Most PIC18 MCUs provide data memory of up to a size of 4 KB (kilobytes). (i) How many bits are required to address the entire content of the 4 KB of the data memory? (ii) [2 marks] Most instructions in PIC18 use 8 bits to identify the address of the file register in data memory. Is this approach sufficient to address the entire data memory of 4 KB? If no, how does PIC18 solve this shortfall? [3 Marks] (iii) If the data memory size is expanded to 8 KB, how many bits are now required to address the entire data memory? How would this affect the current method used by PIC18 instructions that implement the 8-bit file register addressing? How can PIC18 solve this issue? [2 marks]
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a Harvard Architecture Block Diagram CPU Control ALU Registers v Instruction Memory v Data Memory v IO v Bus System Control Address Data Labels CPU Central Processing Unit performs processing and cont... View the full answer
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