A clocked Mealy sequential circuit with one input (X) and one output (Z) is to be...

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A clocked Mealy sequential circuit with one input (X) and one output (Z) is to be designed. The output is to be 0, unless the input is a sequence of exactly two 0 inputs followed by a 1 input. The output changes right after this bit pattern detected. (a) Specify the output sequence for: X=00100100010. (b) Construct a state diagram for the circuit. (c) Encode states with the number of bits necessary and complete its state transition table. (d) Using only T flip flops and basic logic gates to implement a sequential circuit to realize the above logic function. A clocked Mealy sequential circuit with one input (X) and one output (Z) is to be designed. The output is to be 0, unless the input is a sequence of exactly two 0 inputs followed by a 1 input. The output changes right after this bit pattern detected. (a) Specify the output sequence for: X=00100100010. (b) Construct a state diagram for the circuit. (c) Encode states with the number of bits necessary and complete its state transition table. (d) Using only T flip flops and basic logic gates to implement a sequential circuit to realize the above logic function.