A computer system has a 128 byte cache. It uses four-way set-associative mapping with 8 bytes in each block. The physical address size is 32 bits, and the smallest addressable unit is 1 byte.

a) Draw a diagram showing the organization of the cache and indicating how physical addresses are related to cache addresses.

b) To what block frames of the cache can the address 000010AF16 be assigned?

c) If the addresses 000010AF16 and FFFF7Axy16 can be simultaneously assigned to the same cache set, what values can the address digits x and y have?