A computer with a RISC ISA has $32-$bit long instructions, $32$ registers and up to one destination and two

source operands per instruction. Arithmetic and logical instructions have one register output; in addition they

either take two registers inputs or one register and one immediate input. There are sixteen arithmetic and

logical operations, each available in register$-$only and register$-$immediate forms, for a total of $32$ instructions.

All $32$ arithmetic and logical instructions use a separate function field in the instruction format to specify one

of $16$ALU functions. There are sixty combinations to be encoded in the main opcode field. Two of these

are used to specify register$-$only and register$-$immediate instructions.

$($a$)$ Draw one possible instruction format. What is the maximum length of the immediate field for

arithmetic and logical instructions?

$($b$)$ An alternate instruction encoding is possible for exactly the same set of instructions. In this

alternate no separate function field is present; instead the ALU instructions are completely specified

by the new main opcode field. Draw one possible instruction format. What is the new length of the

main opcode field? What is the new maximum length of the immediate field?

$($c$)$ What is the maximum length of PC$-$relative displacement in unconditional jump instructions with

the instruction format in part $($a$)?$ In part $($b$)?$ Assume fixed$-$field decoding; i$.$e$,$ each instruction

format field is present in the same position in all the instructions that contain that field.