A DMA controller is an IP $($Intellectual Property$)$ that is used to control and affect the data transfer between one peripheral to another peripheral, memory to$/$fro peripheral, memory to$/$fro $10\text{'}$s$,$ peripheral to$/$fro $10\text{'}$s$.$

The DMA controller produces source & destination addresses and covers hardware register that can be read & written through the CPU. These include Control, Status and Read$/$Write Data registers. The intent for the registers is to select the DMA controller features, combination of source and destination addresses, transfer direction, transfer unit size and potentially the number of bytes to move in a single burst.

A$.$ With the above background on DMA block write the Device drivers needed for a DMA IP in an SoC.