Question: A MIPS assembly program contains the following instructions and runs on the multi - cycle processor: Instruction SUB LW SW BEQ Number of this instruction

A MIPS assembly program contains the following instructions and runs on the multi-cycle processor: Instruction SUB LW SW BEQ Number of this instruction 50202025 J 151. Find the average CPI of this program. 2. On a 2.5 GHz processor, what is the execution time of this program? 3. If each memory access is given 2 clock cycles, the new frequency of the processor will be 4 GHz. Does this memory modification promise a better performance than the current design? Show your calculations to support your answer.

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