Question: a. Suppose a cache has a 4 nanosecond hit time and a 20 nanosecond miss penalty. What will be the average memory access time (AMAT)

a. Suppose a cache has a 4 nanosecond hit time and a 20 nanosecond miss penalty. What will be the average memory access time (AMAT) for this cache while the miss ratio is 12%?

b. Suppose a memory hierarchy consist of 16 KB main memory and a 2 KB direct mapped L1 cache with block sizes of 512 B. How many bits wide is the main memory address? How many blocks can the cache hold? From a main memory address, how many bits will the cache use as offset bits and how many bits will it use as tag bits?

c. The use of a cache does not improve the access time of main memory. How can the use of a memory hierarchy consisting of a cache and main memory provide a lower overall memory access time compared to the use of only main memory, and under what conditions might the use of the memory hierarchy be worse than the use of only main memory with no cache?

d. When using a virtual memory system, what is the purpose of a Translation Lookaside Buffer?

e. Briefly describe the steps a virtual memory system will follow after encountering a page fault.

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