Question: a ) What would be the baseline performance ( in cycles, per loop iteration ) of the code sequence in the table below, if no
a What would be the baseline performance in cycles, per loop iteration of the code sequence in the table below, if no new instruction's execution could be initiated until the previous instruction's execution had completed? Ignore frontend fetch and decode. Assume for now that execution does not stall for lack of the next instruction, but only one instructioncycle can be issued. Assume the branch is taken, and that there is a one cycle branch delay
slot
Latencies beyond single cycle
tableLDSDIntegerBranchAddDMultDDivD
tableLoop: LDFRxDIVDFFFMULTDFFFLDFRyADDDFFFADDDFFFADDIRxRx#ADDIRyRyHSDFRySUBRRRxBNZRLoop
b points Consider a multipleissue design. Suppose you have Three execution pipelines, each capable of beginning execution of one instruction per cycle, and enough fetchdecode bandwidth in the front end so that it will not stall your execution. Assume results can be immediately forwarded from one execution unit to another, or to itself. Further assume that the only reason an execution pipeline would stall is to observe a true data dependency. Now how many cycles does the loop require? Do schedule them showing the stalls
Execution Pipe Execution Pipe Execution Pipe
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