(a) Write a VHDL program to implement a binary-coded decimal (BCD) counter. The BCD number is a 4-bit binary number. The counter must come out of Reset (RST) and begin counting in ascending order. When it reaches the last BCD number ?9?, the counter will overflow to zero and resume counting again. Moreover, add a new input control pin which enables the BCD counter to count up or down from the current BCD number whenever the pin is asserted as shown in Figure Q3.

(b) Write a VHDL test bench program to simulate the BCD up/down counter in ModelSim- Intel to ensure the counter function properly. Attach simulation results as screenshots.

Reset Up Zero (0000) Up One (0001) Up Nine (1001) Down Up Down Down Down Eight (1000) Up Two (0010) Down Down Seven (0111) Up Figure Q3 Down Three (0011) Down Down Up Down Four (0100) Up Six (0110) Up Five (0101) Up